32 #define cl_khr_command_buffer 1
33 #define CL_KHR_COMMAND_BUFFER_EXTENSION_NAME \
34 "cl_khr_command_buffer"
47 #define CL_DEVICE_COMMAND_BUFFER_CAPABILITIES_KHR 0x12A9
48 #define CL_DEVICE_COMMAND_BUFFER_REQUIRED_QUEUE_PROPERTIES_KHR 0x12AA
51 #define CL_COMMAND_BUFFER_CAPABILITY_KERNEL_PRINTF_KHR (1 << 0)
52 #define CL_COMMAND_BUFFER_CAPABILITY_DEVICE_SIDE_ENQUEUE_KHR (1 << 1)
53 #define CL_COMMAND_BUFFER_CAPABILITY_SIMULTANEOUS_USE_KHR (1 << 2)
54 #define CL_COMMAND_BUFFER_CAPABILITY_OUT_OF_ORDER_KHR (1 << 3)
57 #define CL_COMMAND_BUFFER_FLAGS_KHR 0x1293
60 #define CL_COMMAND_BUFFER_SIMULTANEOUS_USE_KHR (1 << 0)
63 #define CL_INVALID_COMMAND_BUFFER_KHR -1138
64 #define CL_INVALID_SYNC_POINT_WAIT_LIST_KHR -1139
65 #define CL_INCOMPATIBLE_COMMAND_QUEUE_KHR -1140
68 #define CL_COMMAND_BUFFER_QUEUES_KHR 0x1294
69 #define CL_COMMAND_BUFFER_NUM_QUEUES_KHR 0x1295
70 #define CL_COMMAND_BUFFER_REFERENCE_COUNT_KHR 0x1296
71 #define CL_COMMAND_BUFFER_STATE_KHR 0x1297
72 #define CL_COMMAND_BUFFER_PROPERTIES_ARRAY_KHR 0x1298
75 #define CL_COMMAND_BUFFER_STATE_RECORDING_KHR 0
76 #define CL_COMMAND_BUFFER_STATE_EXECUTABLE_KHR 1
77 #define CL_COMMAND_BUFFER_STATE_PENDING_KHR 2
78 #define CL_COMMAND_BUFFER_STATE_INVALID_KHR 3
81 #define CL_COMMAND_COMMAND_BUFFER_KHR 0x12A8
88 const cl_command_buffer_properties_khr* properties,
93 cl_command_buffer_khr command_buffer) ;
97 cl_command_buffer_khr command_buffer) ;
101 cl_command_buffer_khr command_buffer) ;
107 cl_command_buffer_khr command_buffer,
108 cl_uint num_events_in_wait_list,
114 cl_command_buffer_khr command_buffer,
116 cl_uint num_sync_points_in_wait_list,
117 const cl_sync_point_khr* sync_point_wait_list,
118 cl_sync_point_khr* sync_point,
119 cl_mutable_command_khr* mutable_handle) ;
123 cl_command_buffer_khr command_buffer,
130 cl_uint num_sync_points_in_wait_list,
131 const cl_sync_point_khr* sync_point_wait_list,
132 cl_sync_point_khr* sync_point,
133 cl_mutable_command_khr* mutable_handle) ;
137 cl_command_buffer_khr command_buffer,
141 const size_t* src_origin,
142 const size_t* dst_origin,
143 const size_t* region,
144 size_t src_row_pitch,
145 size_t src_slice_pitch,
146 size_t dst_row_pitch,
147 size_t dst_slice_pitch,
148 cl_uint num_sync_points_in_wait_list,
149 const cl_sync_point_khr* sync_point_wait_list,
150 cl_sync_point_khr* sync_point,
151 cl_mutable_command_khr* mutable_handle) ;
155 cl_command_buffer_khr command_buffer,
160 const size_t* dst_origin,
161 const size_t* region,
162 cl_uint num_sync_points_in_wait_list,
163 const cl_sync_point_khr* sync_point_wait_list,
164 cl_sync_point_khr* sync_point,
165 cl_mutable_command_khr* mutable_handle) ;
169 cl_command_buffer_khr command_buffer,
173 const size_t* src_origin,
174 const size_t* dst_origin,
175 const size_t* region,
176 cl_uint num_sync_points_in_wait_list,
177 const cl_sync_point_khr* sync_point_wait_list,
178 cl_sync_point_khr* sync_point,
179 cl_mutable_command_khr* mutable_handle) ;
183 cl_command_buffer_khr command_buffer,
187 const size_t* src_origin,
188 const size_t* region,
190 cl_uint num_sync_points_in_wait_list,
191 const cl_sync_point_khr* sync_point_wait_list,
192 cl_sync_point_khr* sync_point,
193 cl_mutable_command_khr* mutable_handle) ;
197 cl_command_buffer_khr command_buffer,
204 cl_uint num_sync_points_in_wait_list,
205 const cl_sync_point_khr* sync_point_wait_list,
206 cl_sync_point_khr* sync_point,
207 cl_mutable_command_khr* mutable_handle) ;
211 cl_command_buffer_khr command_buffer,
214 const void* fill_color,
215 const size_t* origin,
216 const size_t* region,
217 cl_uint num_sync_points_in_wait_list,
218 const cl_sync_point_khr* sync_point_wait_list,
219 cl_sync_point_khr* sync_point,
220 cl_mutable_command_khr* mutable_handle) ;
224 cl_command_buffer_khr command_buffer,
226 const cl_ndrange_kernel_command_properties_khr* properties,
229 const size_t* global_work_offset,
230 const size_t* global_work_size,
231 const size_t* local_work_size,
232 cl_uint num_sync_points_in_wait_list,
233 const cl_sync_point_khr* sync_point_wait_list,
234 cl_sync_point_khr* sync_point,
235 cl_mutable_command_khr* mutable_handle) ;
239 cl_command_buffer_khr command_buffer,
240 cl_command_buffer_info_khr param_name,
241 size_t param_value_size,
243 size_t* param_value_size_ret) ;
245 #ifndef CL_NO_PROTOTYPES
251 const cl_command_buffer_properties_khr* properties,
256 cl_command_buffer_khr command_buffer) ;
260 cl_command_buffer_khr command_buffer) ;
264 cl_command_buffer_khr command_buffer) ;
270 cl_command_buffer_khr command_buffer,
271 cl_uint num_events_in_wait_list,
277 cl_command_buffer_khr command_buffer,
279 cl_uint num_sync_points_in_wait_list,
280 const cl_sync_point_khr* sync_point_wait_list,
281 cl_sync_point_khr* sync_point,
282 cl_mutable_command_khr* mutable_handle) ;
286 cl_command_buffer_khr command_buffer,
293 cl_uint num_sync_points_in_wait_list,
294 const cl_sync_point_khr* sync_point_wait_list,
295 cl_sync_point_khr* sync_point,
296 cl_mutable_command_khr* mutable_handle) ;
300 cl_command_buffer_khr command_buffer,
304 const size_t* src_origin,
305 const size_t* dst_origin,
306 const size_t* region,
307 size_t src_row_pitch,
308 size_t src_slice_pitch,
309 size_t dst_row_pitch,
310 size_t dst_slice_pitch,
311 cl_uint num_sync_points_in_wait_list,
312 const cl_sync_point_khr* sync_point_wait_list,
313 cl_sync_point_khr* sync_point,
314 cl_mutable_command_khr* mutable_handle) ;
318 cl_command_buffer_khr command_buffer,
323 const size_t* dst_origin,
324 const size_t* region,
325 cl_uint num_sync_points_in_wait_list,
326 const cl_sync_point_khr* sync_point_wait_list,
327 cl_sync_point_khr* sync_point,
328 cl_mutable_command_khr* mutable_handle) ;
332 cl_command_buffer_khr command_buffer,
336 const size_t* src_origin,
337 const size_t* dst_origin,
338 const size_t* region,
339 cl_uint num_sync_points_in_wait_list,
340 const cl_sync_point_khr* sync_point_wait_list,
341 cl_sync_point_khr* sync_point,
342 cl_mutable_command_khr* mutable_handle) ;
346 cl_command_buffer_khr command_buffer,
350 const size_t* src_origin,
351 const size_t* region,
353 cl_uint num_sync_points_in_wait_list,
354 const cl_sync_point_khr* sync_point_wait_list,
355 cl_sync_point_khr* sync_point,
356 cl_mutable_command_khr* mutable_handle) ;
360 cl_command_buffer_khr command_buffer,
367 cl_uint num_sync_points_in_wait_list,
368 const cl_sync_point_khr* sync_point_wait_list,
369 cl_sync_point_khr* sync_point,
370 cl_mutable_command_khr* mutable_handle) ;
374 cl_command_buffer_khr command_buffer,
377 const void* fill_color,
378 const size_t* origin,
379 const size_t* region,
380 cl_uint num_sync_points_in_wait_list,
381 const cl_sync_point_khr* sync_point_wait_list,
382 cl_sync_point_khr* sync_point,
383 cl_mutable_command_khr* mutable_handle) ;
387 cl_command_buffer_khr command_buffer,
389 const cl_ndrange_kernel_command_properties_khr* properties,
392 const size_t* global_work_offset,
393 const size_t* global_work_size,
394 const size_t* local_work_size,
395 cl_uint num_sync_points_in_wait_list,
396 const cl_sync_point_khr* sync_point_wait_list,
397 cl_sync_point_khr* sync_point,
398 cl_mutable_command_khr* mutable_handle) ;
402 cl_command_buffer_khr command_buffer,
403 cl_command_buffer_info_khr param_name,
404 size_t param_value_size,
406 size_t* param_value_size_ret) ;
413 #define cl_khr_command_buffer_mutable_dispatch 1
414 #define CL_KHR_COMMAND_BUFFER_MUTABLE_DISPATCH_EXTENSION_NAME \
415 "cl_khr_command_buffer_mutable_dispatch"
431 cl_command_buffer_structure_type_khr
type;
446 cl_command_buffer_structure_type_khr
type;
453 #define CL_COMMAND_BUFFER_MUTABLE_KHR (1 << 1)
456 #define CL_INVALID_MUTABLE_COMMAND_KHR -1141
459 #define CL_DEVICE_MUTABLE_DISPATCH_CAPABILITIES_KHR 0x12B0
462 #define CL_MUTABLE_DISPATCH_UPDATABLE_FIELDS_KHR 0x12B1
465 #define CL_MUTABLE_DISPATCH_GLOBAL_OFFSET_KHR (1 << 0)
466 #define CL_MUTABLE_DISPATCH_GLOBAL_SIZE_KHR (1 << 1)
467 #define CL_MUTABLE_DISPATCH_LOCAL_SIZE_KHR (1 << 2)
468 #define CL_MUTABLE_DISPATCH_ARGUMENTS_KHR (1 << 3)
469 #define CL_MUTABLE_DISPATCH_EXEC_INFO_KHR (1 << 4)
472 #define CL_MUTABLE_COMMAND_COMMAND_QUEUE_KHR 0x12A0
473 #define CL_MUTABLE_COMMAND_COMMAND_BUFFER_KHR 0x12A1
474 #define CL_MUTABLE_COMMAND_COMMAND_TYPE_KHR 0x12AD
475 #define CL_MUTABLE_DISPATCH_PROPERTIES_ARRAY_KHR 0x12A2
476 #define CL_MUTABLE_DISPATCH_KERNEL_KHR 0x12A3
477 #define CL_MUTABLE_DISPATCH_DIMENSIONS_KHR 0x12A4
478 #define CL_MUTABLE_DISPATCH_GLOBAL_WORK_OFFSET_KHR 0x12A5
479 #define CL_MUTABLE_DISPATCH_GLOBAL_WORK_SIZE_KHR 0x12A6
480 #define CL_MUTABLE_DISPATCH_LOCAL_WORK_SIZE_KHR 0x12A7
483 #define CL_STRUCTURE_TYPE_MUTABLE_BASE_CONFIG_KHR 0
484 #define CL_STRUCTURE_TYPE_MUTABLE_DISPATCH_CONFIG_KHR 1
489 cl_command_buffer_khr command_buffer,
494 cl_mutable_command_khr command,
495 cl_mutable_command_info_khr param_name,
496 size_t param_value_size,
498 size_t* param_value_size_ret) ;
500 #ifndef CL_NO_PROTOTYPES
504 cl_command_buffer_khr command_buffer,
509 cl_mutable_command_khr command,
510 cl_mutable_command_info_khr param_name,
511 size_t param_value_size,
513 size_t* param_value_size_ret) ;
520 #if CL_TARGET_OPENCL_VERSION <= 110
521 #define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032
525 #define CL_DEVICE_HALF_FP_CONFIG 0x1033
544 #define cl_APPLE_SetMemObjectDestructor 1
546 void (* pfn_notify)(
cl_mem memobj,
void * user_data),
558 #define cl_APPLE_ContextLoggingFunctions 1
560 const void * private_info,
566 const void * private_info,
572 const void * private_info,
583 #define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920
586 #define CL_PLATFORM_NOT_FOUND_KHR -1001
602 #define cl_khr_il_program 1
607 #define CL_DEVICE_IL_VERSION_KHR 0x105B
612 #define CL_PROGRAM_IL_KHR 0x1169
645 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR 0x104A
646 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR 0x104B
653 #define CL_CONTEXT_MEMORY_INITIALIZE_KHR 0x2030
660 #define CL_CONTEXT_TERMINATED_KHR -1121
662 #define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031
663 #define CL_CONTEXT_TERMINATE_KHR 0x2032
665 #define cl_khr_terminate_context 1
680 #define CL_DEVICE_SPIR_VERSIONS 0x40E0
681 #define CL_PROGRAM_BINARY_TYPE_INTERMEDIATE 0x40E1
687 #define cl_khr_create_command_queue 1
694 const cl_queue_properties_khr* properties,
700 const cl_queue_properties_khr* properties,
701 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
709 #define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
710 #define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
711 #define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002
712 #define CL_DEVICE_WARP_SIZE_NV 0x4003
713 #define CL_DEVICE_GPU_OVERLAP_NV 0x4004
714 #define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
715 #define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006
722 #define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036
723 #define CL_DEVICE_TOPOLOGY_AMD 0x4037
724 #define CL_DEVICE_BOARD_NAME_AMD 0x4038
725 #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
726 #define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040
727 #define CL_DEVICE_SIMD_WIDTH_AMD 0x4041
728 #define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042
729 #define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
730 #define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044
731 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045
732 #define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046
733 #define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047
734 #define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048
735 #define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049
736 #define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A
737 #define CL_DEVICE_GFXIP_MINOR_AMD 0x404B
738 #define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C
739 #define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030
740 #define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031
741 #define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033
742 #define CL_DEVICE_PCIE_ID_AMD 0x4034
749 #define CL_PRINTF_CALLBACK_ARM 0x40B0
750 #define CL_PRINTF_BUFFERSIZE_ARM 0x40B1
756 #define cl_ext_device_fission 1
773 const cl_device_partition_property_ext * properties,
780 const cl_device_partition_property_ext * properties,
783 cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_1;
786 #define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050
787 #define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051
788 #define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052
789 #define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053
792 #define CL_DEVICE_PARENT_DEVICE_EXT 0x4054
793 #define CL_DEVICE_PARTITION_TYPES_EXT 0x4055
794 #define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056
795 #define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057
796 #define CL_DEVICE_PARTITION_STYLE_EXT 0x4058
799 #define CL_DEVICE_PARTITION_FAILED_EXT -1057
800 #define CL_INVALID_PARTITION_COUNT_EXT -1058
801 #define CL_INVALID_PARTITION_NAME_EXT -1059
804 #define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1
805 #define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2
806 #define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3
807 #define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4
808 #define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10
809 #define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100
812 #define CL_PROPERTIES_LIST_END_EXT ((cl_device_partition_property_ext) 0)
813 #define CL_PARTITION_BY_COUNTS_LIST_END_EXT ((cl_device_partition_property_ext) 0)
814 #define CL_PARTITION_BY_NAMES_LIST_END_EXT ((cl_device_partition_property_ext) 0 - 1)
820 #define cl_ext_migrate_memobject 1
824 #define CL_MIGRATE_MEM_OBJECT_HOST_EXT 0x1
826 #define CL_COMMAND_MIGRATE_MEM_OBJECT_EXT 0x4040
831 const cl_mem * mem_objects,
832 cl_mem_migration_flags_ext
flags,
833 cl_uint num_events_in_wait_list,
840 const cl_mem * mem_objects,
841 cl_mem_migration_flags_ext
flags,
842 cl_uint num_events_in_wait_list,
850 #define cl_ext_cxx_for_opencl 1
852 #define CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT 0x4230
857 #define cl_qcom_ext_host_ptr 1
859 #define CL_MEM_EXT_HOST_PTR_QCOM (1 << 29)
861 #define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0
862 #define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1
863 #define CL_IMAGE_ROW_ALIGNMENT_QCOM 0x40A2
864 #define CL_IMAGE_SLICE_ALIGNMENT_QCOM 0x40A3
865 #define CL_MEM_HOST_UNCACHED_QCOM 0x40A4
866 #define CL_MEM_HOST_WRITEBACK_QCOM 0x40A5
867 #define CL_MEM_HOST_WRITETHROUGH_QCOM 0x40A6
868 #define CL_MEM_HOST_WRITE_COMBINING_QCOM 0x40A7
877 cl_image_pitch_info_qcom param_name,
878 size_t param_value_size,
880 size_t *param_value_size_ret);
899 #define CL_MEM_HOST_IOCOHERENT_QCOM 0x40A9
906 #define CL_MEM_ION_HOST_PTR_QCOM 0x40A8
927 #define CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM 0x40C6
946 #define CL_NV21_IMG 0x40D0
947 #define CL_YV12_IMG 0x40D1
955 #define CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG (1 << 26)
956 #define CL_MEM_USE_CACHED_CPU_MEMORY_IMG (1 << 27)
962 #define cl_img_use_gralloc_ptr 1
965 #define CL_MEM_USE_GRALLOC_PTR_IMG (1 << 28)
968 #define CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG 0x40D2
969 #define CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG 0x40D3
972 #define CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG 0x40D4
973 #define CL_INVALID_GRALLOC_OBJECT_IMG 0x40D5
978 const cl_mem * mem_objects,
979 cl_uint num_events_in_wait_list,
986 const cl_mem * mem_objects,
987 cl_uint num_events_in_wait_list,
994 #define cl_img_generate_mipmap 1
999 #define CL_MIPMAP_FILTER_ANY_IMG 0x0
1000 #define CL_MIPMAP_FILTER_BOX_IMG 0x1
1003 #define CL_COMMAND_GENERATE_MIPMAP_IMG 0x40D6
1009 cl_mipmap_filter_mode_img mipmap_filter_mode,
1010 const size_t *array_region,
1011 const size_t *mip_region,
1012 cl_uint num_events_in_wait_list,
1019 #define cl_img_mem_properties 1
1022 #define CL_MEM_ALLOC_FLAGS_IMG 0x40D7
1028 #define CL_MEM_ALLOC_RELAX_REQUIREMENTS_IMG (1 << 0)
1033 #define cl_khr_subgroups 1
1035 #if !defined(CL_VERSION_2_1)
1044 #define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR 0x2033
1045 #define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR 0x2034
1050 cl_kernel_sub_group_info param_name,
1051 size_t input_value_size,
1052 const void * input_value,
1053 size_t param_value_size,
1060 cl_kernel_sub_group_info param_name,
1061 size_t input_value_size,
1062 const void * input_value,
1063 size_t param_value_size,
1065 size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED;
1073 #define CL_SAMPLER_MIP_FILTER_MODE_KHR 0x1155
1074 #define CL_SAMPLER_LOD_MIN_KHR 0x1156
1075 #define CL_SAMPLER_LOD_MAX_KHR 0x1157
1083 #define cl_khr_priority_hints 1
1088 #define CL_QUEUE_PRIORITY_KHR 0x1096
1091 #define CL_QUEUE_PRIORITY_HIGH_KHR (1<<0)
1092 #define CL_QUEUE_PRIORITY_MED_KHR (1<<1)
1093 #define CL_QUEUE_PRIORITY_LOW_KHR (1<<2)
1101 #define cl_khr_throttle_hints 1
1106 #define CL_QUEUE_THROTTLE_KHR 0x1097
1109 #define CL_QUEUE_THROTTLE_HIGH_KHR (1<<0)
1110 #define CL_QUEUE_THROTTLE_MED_KHR (1<<1)
1111 #define CL_QUEUE_THROTTLE_LOW_KHR (1<<2)
1119 #define cl_khr_subgroup_named_barrier 1
1122 #define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035
1129 #define cl_khr_extended_versioning 1
1131 #define CL_VERSION_MAJOR_BITS_KHR (10)
1132 #define CL_VERSION_MINOR_BITS_KHR (10)
1133 #define CL_VERSION_PATCH_BITS_KHR (12)
1135 #define CL_VERSION_MAJOR_MASK_KHR ((1 << CL_VERSION_MAJOR_BITS_KHR) - 1)
1136 #define CL_VERSION_MINOR_MASK_KHR ((1 << CL_VERSION_MINOR_BITS_KHR) - 1)
1137 #define CL_VERSION_PATCH_MASK_KHR ((1 << CL_VERSION_PATCH_BITS_KHR) - 1)
1139 #define CL_VERSION_MAJOR_KHR(version) ((version) >> (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR))
1140 #define CL_VERSION_MINOR_KHR(version) (((version) >> CL_VERSION_PATCH_BITS_KHR) & CL_VERSION_MINOR_MASK_KHR)
1141 #define CL_VERSION_PATCH_KHR(version) ((version) & CL_VERSION_PATCH_MASK_KHR)
1143 #define CL_MAKE_VERSION_KHR(major, minor, patch) \
1144 ((((major) & CL_VERSION_MAJOR_MASK_KHR) << (CL_VERSION_MINOR_BITS_KHR + CL_VERSION_PATCH_BITS_KHR)) | \
1145 (((minor) & CL_VERSION_MINOR_MASK_KHR) << CL_VERSION_PATCH_BITS_KHR) | \
1146 ((patch) & CL_VERSION_PATCH_MASK_KHR))
1150 #define CL_NAME_VERSION_MAX_NAME_SIZE_KHR 64
1159 #define CL_PLATFORM_NUMERIC_VERSION_KHR 0x0906
1160 #define CL_PLATFORM_EXTENSIONS_WITH_VERSION_KHR 0x0907
1163 #define CL_DEVICE_NUMERIC_VERSION_KHR 0x105E
1164 #define CL_DEVICE_OPENCL_C_NUMERIC_VERSION_KHR 0x105F
1165 #define CL_DEVICE_EXTENSIONS_WITH_VERSION_KHR 0x1060
1166 #define CL_DEVICE_ILS_WITH_VERSION_KHR 0x1061
1167 #define CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION_KHR 0x1062
1173 #define cl_khr_device_uuid 1
1175 #define CL_UUID_SIZE_KHR 16
1176 #define CL_LUID_SIZE_KHR 8
1178 #define CL_DEVICE_UUID_KHR 0x106A
1179 #define CL_DRIVER_UUID_KHR 0x106B
1180 #define CL_DEVICE_LUID_VALID_KHR 0x106C
1181 #define CL_DEVICE_LUID_KHR 0x106D
1182 #define CL_DEVICE_NODE_MASK_KHR 0x106E
1188 #define cl_khr_pci_bus_info 1
1198 #define CL_DEVICE_PCI_BUS_INFO_KHR 0x410F
1204 #define cl_khr_suggested_local_work_size 1
1211 const size_t* global_work_offset,
1212 const size_t* global_work_size,
1220 const size_t* global_work_offset,
1221 const size_t* global_work_size,
1222 size_t* suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0;
1228 #define cl_khr_integer_dot_product 1
1233 #define CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_PACKED_KHR (1 << 0)
1234 #define CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_KHR (1 << 1)
1246 #define CL_DEVICE_INTEGER_DOT_PRODUCT_CAPABILITIES_KHR 0x1073
1247 #define CL_DEVICE_INTEGER_DOT_PRODUCT_ACCELERATION_PROPERTIES_8BIT_KHR 0x1074
1248 #define CL_DEVICE_INTEGER_DOT_PRODUCT_ACCELERATION_PROPERTIES_4x8BIT_PACKED_KHR 0x1075
1254 #define cl_khr_external_memory 1
1259 #define CL_PLATFORM_EXTERNAL_MEMORY_IMPORT_HANDLE_TYPES_KHR 0x2044
1262 #define CL_DEVICE_EXTERNAL_MEMORY_IMPORT_HANDLE_TYPES_KHR 0x204F
1265 #define CL_DEVICE_HANDLE_LIST_KHR 0x2051
1266 #define CL_DEVICE_HANDLE_LIST_END_KHR 0
1269 #define CL_COMMAND_ACQUIRE_EXTERNAL_MEM_OBJECTS_KHR 0x2047
1270 #define CL_COMMAND_RELEASE_EXTERNAL_MEM_OBJECTS_KHR 0x2048
1277 const cl_mem* mem_objects,
1278 cl_uint num_events_in_wait_list,
1286 const cl_mem* mem_objects,
1287 cl_uint num_events_in_wait_list,
1295 const cl_mem* mem_objects,
1296 cl_uint num_events_in_wait_list,
1304 const cl_mem* mem_objects,
1305 cl_uint num_events_in_wait_list,
1312 #define cl_khr_external_memory_dma_buf 1
1315 #define CL_EXTERNAL_MEMORY_HANDLE_DMA_BUF_KHR 0x2067
1320 #define cl_khr_external_memory_dx 1
1323 #define CL_EXTERNAL_MEMORY_HANDLE_D3D11_TEXTURE_KHR 0x2063
1324 #define CL_EXTERNAL_MEMORY_HANDLE_D3D11_TEXTURE_KMT_KHR 0x2064
1325 #define CL_EXTERNAL_MEMORY_HANDLE_D3D12_HEAP_KHR 0x2065
1326 #define CL_EXTERNAL_MEMORY_HANDLE_D3D12_RESOURCE_KHR 0x2066
1331 #define cl_khr_external_memory_opaque_fd 1
1334 #define CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_FD_KHR 0x2060
1339 #define cl_khr_external_memory_win32 1
1342 #define CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_WIN32_KHR 0x2061
1343 #define CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_WIN32_KMT_KHR 0x2062
1348 #define cl_khr_external_semaphore 1
1354 #define CL_PLATFORM_SEMAPHORE_IMPORT_HANDLE_TYPES_KHR 0x2037
1355 #define CL_PLATFORM_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR 0x2038
1358 #define CL_DEVICE_SEMAPHORE_IMPORT_HANDLE_TYPES_KHR 0x204D
1359 #define CL_DEVICE_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR 0x204E
1362 #define CL_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR 0x203F
1363 #define CL_SEMAPHORE_EXPORT_HANDLE_TYPES_LIST_END_KHR 0
1368 cl_semaphore_khr sema_object,
1370 cl_external_semaphore_handle_type_khr handle_type,
1373 size_t* handle_size_ret) CL_API_SUFFIX__VERSION_1_2;
1377 cl_semaphore_khr sema_object,
1379 cl_external_semaphore_handle_type_khr handle_type,
1387 #define cl_khr_external_semaphore_dx_fence 1
1390 #define CL_SEMAPHORE_HANDLE_D3D12_FENCE_KHR 0x2059
1395 #define cl_khr_external_semaphore_opaque_fd 1
1398 #define CL_SEMAPHORE_HANDLE_OPAQUE_FD_KHR 0x2055
1403 #define cl_khr_external_semaphore_sync_fd 1
1406 #define CL_SEMAPHORE_HANDLE_SYNC_FD_KHR 0x2058
1411 #define cl_khr_external_semaphore_win32 1
1414 #define CL_SEMAPHORE_HANDLE_OPAQUE_WIN32_KHR 0x2056
1415 #define CL_SEMAPHORE_HANDLE_OPAQUE_WIN32_KMT_KHR 0x2057
1420 #define cl_khr_semaphore 1
1429 #define CL_SEMAPHORE_TYPE_BINARY_KHR 1
1432 #define CL_PLATFORM_SEMAPHORE_TYPES_KHR 0x2036
1435 #define CL_DEVICE_SEMAPHORE_TYPES_KHR 0x204C
1438 #define CL_SEMAPHORE_CONTEXT_KHR 0x2039
1439 #define CL_SEMAPHORE_REFERENCE_COUNT_KHR 0x203A
1440 #define CL_SEMAPHORE_PROPERTIES_KHR 0x203B
1441 #define CL_SEMAPHORE_PAYLOAD_KHR 0x203C
1444 #define CL_SEMAPHORE_TYPE_KHR 0x203D
1449 #define CL_COMMAND_SEMAPHORE_WAIT_KHR 0x2042
1450 #define CL_COMMAND_SEMAPHORE_SIGNAL_KHR 0x2043
1453 #define CL_INVALID_SEMAPHORE_KHR -1142
1459 const cl_semaphore_properties_khr* sema_props,
1460 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
1466 const cl_semaphore_khr* sema_objects,
1467 const cl_semaphore_payload_khr* sema_payload_list,
1468 cl_uint num_events_in_wait_list,
1476 const cl_semaphore_khr* sema_objects,
1477 const cl_semaphore_payload_khr* sema_payload_list,
1478 cl_uint num_events_in_wait_list,
1484 cl_semaphore_khr sema_object,
1485 cl_semaphore_info_khr param_name,
1486 size_t param_value_size,
1488 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2;
1492 cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2;
1496 cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2;
1501 const cl_semaphore_properties_khr* sema_props,
1508 const cl_semaphore_khr* sema_objects,
1509 const cl_semaphore_payload_khr* sema_payload_list,
1510 cl_uint num_events_in_wait_list,
1518 const cl_semaphore_khr* sema_objects,
1519 const cl_semaphore_payload_khr* sema_payload_list,
1520 cl_uint num_events_in_wait_list,
1526 cl_semaphore_khr sema_object,
1527 cl_semaphore_info_khr param_name,
1528 size_t param_value_size,
1543 #define cl_arm_import_memory 1
1548 #define CL_IMPORT_TYPE_ARM 0x40B2
1551 #define CL_IMPORT_TYPE_HOST_ARM 0x40B3
1554 #define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4
1557 #define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5
1560 #define CL_IMPORT_TYPE_ANDROID_HARDWARE_BUFFER_ARM 0x41E2
1563 #define CL_IMPORT_DMA_BUF_DATA_CONSISTENCY_WITH_HOST_ARM 0x41E3
1566 #define CL_IMPORT_ANDROID_HARDWARE_BUFFER_PLANE_INDEX_ARM 0x41EF
1569 #define CL_IMPORT_ANDROID_HARDWARE_BUFFER_LAYER_INDEX_ARM 0x41F0
1572 #define CL_IMPORT_MEMORY_WHOLE_ALLOCATION_ARM SIZE_MAX
1593 const cl_import_properties_arm *properties,
1602 #define cl_arm_shared_virtual_memory 1
1605 #define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6
1608 #define CL_MEM_USES_SVM_POINTER_ARM 0x40B7
1611 #define CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM 0x40B8
1612 #define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM 0x40B9
1615 #define CL_COMMAND_SVM_FREE_ARM 0x40BA
1616 #define CL_COMMAND_SVM_MEMCPY_ARM 0x40BB
1617 #define CL_COMMAND_SVM_MEMFILL_ARM 0x40BC
1618 #define CL_COMMAND_SVM_MAP_ARM 0x40BD
1619 #define CL_COMMAND_SVM_UNMAP_ARM 0x40BE
1622 #define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM (1 << 0)
1623 #define CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM (1 << 1)
1624 #define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM (1 << 2)
1625 #define CL_DEVICE_SVM_ATOMICS_ARM (1 << 3)
1628 #define CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM (1 << 10)
1629 #define CL_MEM_SVM_ATOMICS_ARM (1 << 11)
1637 cl_svm_mem_flags_arm flags,
1648 void * svm_pointers[],
1651 void * svm_pointers[],
1654 cl_uint num_events_in_wait_list,
1662 const void * src_ptr,
1664 cl_uint num_events_in_wait_list,
1671 const void * pattern,
1672 size_t pattern_size,
1674 cl_uint num_events_in_wait_list,
1684 cl_uint num_events_in_wait_list,
1691 cl_uint num_events_in_wait_list,
1702 cl_kernel_exec_info_arm param_name,
1703 size_t param_value_size,
1710 #ifdef CL_VERSION_1_2
1712 #define cl_arm_get_core_id 1
1715 #define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF
1723 #define cl_arm_job_slot_selection 1
1726 #define CL_DEVICE_JOB_SLOTS_ARM 0x41E0
1729 #define CL_QUEUE_JOB_SLOT_ARM 0x41E1
1735 #define cl_arm_scheduling_controls 1
1740 #define CL_DEVICE_SCHEDULING_CONTROLS_CAPABILITIES_ARM 0x41E4
1742 #define CL_DEVICE_SCHEDULING_KERNEL_BATCHING_ARM (1 << 0)
1743 #define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_ARM (1 << 1)
1744 #define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_MODIFIER_ARM (1 << 2)
1745 #define CL_DEVICE_SCHEDULING_DEFERRED_FLUSH_ARM (1 << 3)
1746 #define CL_DEVICE_SCHEDULING_REGISTER_ALLOCATION_ARM (1 << 4)
1747 #define CL_DEVICE_SCHEDULING_WARP_THROTTLING_ARM (1 << 5)
1748 #define CL_DEVICE_SCHEDULING_COMPUTE_UNIT_BATCH_QUEUE_SIZE_ARM (1 << 6)
1750 #define CL_DEVICE_SUPPORTED_REGISTER_ALLOCATIONS_ARM 0x41EB
1751 #define CL_DEVICE_MAX_WARP_COUNT_ARM 0x41EA
1754 #define CL_KERNEL_MAX_WARP_COUNT_ARM 0x41E9
1757 #define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_ARM 0x41E5
1758 #define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_MODIFIER_ARM 0x41E6
1759 #define CL_KERNEL_EXEC_INFO_WARP_COUNT_LIMIT_ARM 0x41E8
1760 #define CL_KERNEL_EXEC_INFO_COMPUTE_UNIT_MAX_QUEUED_BATCHES_ARM 0x41F1
1763 #define CL_QUEUE_KERNEL_BATCHING_ARM 0x41E7
1764 #define CL_QUEUE_DEFERRED_FLUSH_ARM 0x41EC
1770 #define cl_arm_controlled_kernel_termination 1
1773 #define CL_COMMAND_TERMINATED_ITSELF_WITH_FAILURE_ARM -1108
1776 #define CL_DEVICE_CONTROLLED_TERMINATION_CAPABILITIES_ARM 0x41EE
1781 #define CL_DEVICE_CONTROLLED_TERMINATION_SUCCESS_ARM (1 << 0)
1782 #define CL_DEVICE_CONTROLLED_TERMINATION_FAILURE_ARM (1 << 1)
1783 #define CL_DEVICE_CONTROLLED_TERMINATION_QUERY_ARM (1 << 2)
1786 #define CL_EVENT_COMMAND_TERMINATION_REASON_ARM 0x41ED
1791 #define CL_COMMAND_TERMINATION_COMPLETION_ARM 0
1792 #define CL_COMMAND_TERMINATION_CONTROLLED_SUCCESS_ARM 1
1793 #define CL_COMMAND_TERMINATION_CONTROLLED_FAILURE_ARM 2
1794 #define CL_COMMAND_TERMINATION_ERROR_ARM 3
1800 #define cl_arm_protected_memory_allocation 1
1802 #define CL_MEM_PROTECTED_ALLOC_ARM (1ULL << 36)
1808 #define cl_intel_exec_by_local_thread 1
1810 #define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31)
1816 #define cl_intel_device_attribute_query 1
1821 #define CL_DEVICE_FEATURE_FLAG_DP4A_INTEL (1 << 0)
1822 #define CL_DEVICE_FEATURE_FLAG_DPAS_INTEL (1 << 1)
1825 #define CL_DEVICE_IP_VERSION_INTEL 0x4250
1826 #define CL_DEVICE_ID_INTEL 0x4251
1827 #define CL_DEVICE_NUM_SLICES_INTEL 0x4252
1828 #define CL_DEVICE_NUM_SUB_SLICES_PER_SLICE_INTEL 0x4253
1829 #define CL_DEVICE_NUM_EUS_PER_SUB_SLICE_INTEL 0x4254
1830 #define CL_DEVICE_NUM_THREADS_PER_EU_INTEL 0x4255
1831 #define CL_DEVICE_FEATURE_CAPABILITIES_INTEL 0x4256
1837 #define cl_intel_device_partition_by_names 1
1839 #define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052
1840 #define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1
1848 #define cl_intel_accelerator 1
1849 #define cl_intel_motion_estimation 1
1850 #define cl_intel_advanced_motion_estimation 1
1864 #define CL_INVALID_ACCELERATOR_INTEL -1094
1865 #define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095
1866 #define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096
1867 #define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097
1870 #define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0
1873 #define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090
1874 #define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091
1875 #define CL_ACCELERATOR_CONTEXT_INTEL 0x4092
1876 #define CL_ACCELERATOR_TYPE_INTEL 0x4093
1879 #define CL_ME_MB_TYPE_16x16_INTEL 0x0
1880 #define CL_ME_MB_TYPE_8x8_INTEL 0x1
1881 #define CL_ME_MB_TYPE_4x4_INTEL 0x2
1883 #define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
1884 #define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
1885 #define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2
1887 #define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
1888 #define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1
1890 #define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0
1891 #define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1
1892 #define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5
1894 #define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0
1895 #define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1
1896 #define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2
1897 #define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4
1899 #define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1
1900 #define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2
1901 #define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3
1903 #define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16
1904 #define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21
1905 #define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32
1906 #define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43
1907 #define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48
1909 #define CL_ME_COST_PENALTY_NONE_INTEL 0x0
1910 #define CL_ME_COST_PENALTY_LOW_INTEL 0x1
1911 #define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2
1912 #define CL_ME_COST_PENALTY_HIGH_INTEL 0x3
1914 #define CL_ME_COST_PRECISION_QPEL_INTEL 0x0
1915 #define CL_ME_COST_PRECISION_HPEL_INTEL 0x1
1916 #define CL_ME_COST_PRECISION_PEL_INTEL 0x2
1917 #define CL_ME_COST_PRECISION_DPEL_INTEL 0x3
1919 #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
1920 #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1921 #define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
1922 #define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
1924 #define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
1925 #define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
1926 #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
1927 #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
1928 #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
1929 #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
1931 #define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
1932 #define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
1933 #define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
1934 #define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
1937 #define CL_DEVICE_ME_VERSION_INTEL 0x407E
1939 #define CL_ME_VERSION_LEGACY_INTEL 0x0
1940 #define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1
1941 #define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2
1946 cl_accelerator_type_intel accelerator_type,
1947 size_t descriptor_size,
1948 const void* descriptor,
1953 cl_accelerator_type_intel accelerator_type,
1954 size_t descriptor_size,
1955 const void* descriptor,
1956 cl_int* errcode_ret) CL_API_SUFFIX__VERSION_1_2;
1960 cl_accelerator_intel accelerator,
1961 cl_accelerator_info_intel param_name,
1962 size_t param_value_size,
1967 cl_accelerator_intel accelerator,
1968 cl_accelerator_info_intel param_name,
1969 size_t param_value_size,
1971 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_1_2;
1978 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1985 cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2;
1991 #define cl_intel_simultaneous_sharing 1
1993 #define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104
1994 #define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105
2000 #define cl_intel_egl_image_yuv 1
2002 #define CL_EGL_YUV_PLANE_INTEL 0x4107
2008 #define cl_intel_packed_yuv 1
2010 #define CL_YUYV_INTEL 0x4076
2011 #define CL_UYVY_INTEL 0x4077
2012 #define CL_YVYU_INTEL 0x4078
2013 #define CL_VYUY_INTEL 0x4079
2019 #define cl_intel_required_subgroup_size 1
2021 #define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108
2022 #define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109
2023 #define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A
2029 #define cl_intel_driver_diagnostics 1
2033 #define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106
2035 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff )
2036 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 )
2037 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 )
2038 #define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 )
2044 #define CL_NV12_INTEL 0x410E
2046 #define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 )
2047 #define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 )
2049 #define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E
2050 #define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F
2056 #define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B
2057 #define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C
2058 #define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D
2060 #define CL_AVC_ME_VERSION_0_INTEL 0x0
2061 #define CL_AVC_ME_VERSION_1_INTEL 0x1
2063 #define CL_AVC_ME_MAJOR_16x16_INTEL 0x0
2064 #define CL_AVC_ME_MAJOR_16x8_INTEL 0x1
2065 #define CL_AVC_ME_MAJOR_8x16_INTEL 0x2
2066 #define CL_AVC_ME_MAJOR_8x8_INTEL 0x3
2068 #define CL_AVC_ME_MINOR_8x8_INTEL 0x0
2069 #define CL_AVC_ME_MINOR_8x4_INTEL 0x1
2070 #define CL_AVC_ME_MINOR_4x8_INTEL 0x2
2071 #define CL_AVC_ME_MINOR_4x4_INTEL 0x3
2073 #define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0
2074 #define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1
2075 #define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2
2077 #define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0
2078 #define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E
2079 #define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D
2080 #define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B
2081 #define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77
2082 #define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F
2083 #define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F
2084 #define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F
2086 #define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0
2087 #define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1
2088 #define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2
2089 #define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3
2090 #define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4
2091 #define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5
2092 #define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6
2093 #define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7
2094 #define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8
2095 #define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9
2096 #define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2
2097 #define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa
2099 #define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
2100 #define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2
2102 #define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
2103 #define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
2104 #define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3
2106 #define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0
2107 #define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1
2108 #define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2
2109 #define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3
2111 #define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10
2112 #define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15
2113 #define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20
2114 #define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B
2115 #define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30
2117 #define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0
2118 #define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2
2119 #define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4
2120 #define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8
2122 #define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0
2123 #define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000
2125 #define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
2126 #define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
2127 #define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 )
2128 #define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 )
2129 #define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 )
2130 #define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 )
2131 #define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
2132 #define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
2133 #define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 )
2134 #define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 )
2135 #define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 )
2136 #define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 )
2137 #define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 )
2138 #define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 )
2140 #define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00
2141 #define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80
2143 #define CL_AVC_ME_INTRA_16x16_INTEL 0x0
2144 #define CL_AVC_ME_INTRA_8x8_INTEL 0x1
2145 #define CL_AVC_ME_INTRA_4x4_INTEL 0x2
2147 #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6
2148 #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5
2149 #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3
2151 #define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60
2152 #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10
2153 #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8
2154 #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4
2156 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
2157 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
2158 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
2159 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
2160 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
2161 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
2162 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
2163 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
2164 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
2165 #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
2166 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
2167 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
2168 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
2169 #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
2171 #define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1
2172 #define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2
2173 #define CL_AVC_ME_FRAME_DUAL_INTEL 0x3
2175 #define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0
2176 #define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1
2177 #define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2
2179 #define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0
2180 #define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1
2185 #define cl_intel_unified_shared_memory 1
2195 #define CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL 0x4190
2196 #define CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL 0x4191
2197 #define CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4192
2198 #define CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4193
2199 #define CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL 0x4194
2202 #define CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL (1 << 0)
2203 #define CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL (1 << 1)
2204 #define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL (1 << 2)
2205 #define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL (1 << 3)
2208 #define CL_MEM_ALLOC_FLAGS_INTEL 0x4195
2211 #define CL_MEM_ALLOC_WRITE_COMBINED_INTEL (1 << 0)
2212 #define CL_MEM_ALLOC_INITIAL_PLACEMENT_DEVICE_INTEL (1 << 1)
2213 #define CL_MEM_ALLOC_INITIAL_PLACEMENT_HOST_INTEL (1 << 2)
2216 #define CL_MEM_ALLOC_TYPE_INTEL 0x419A
2217 #define CL_MEM_ALLOC_BASE_PTR_INTEL 0x419B
2218 #define CL_MEM_ALLOC_SIZE_INTEL 0x419C
2219 #define CL_MEM_ALLOC_DEVICE_INTEL 0x419D
2222 #define CL_MEM_TYPE_UNKNOWN_INTEL 0x4196
2223 #define CL_MEM_TYPE_HOST_INTEL 0x4197
2224 #define CL_MEM_TYPE_DEVICE_INTEL 0x4198
2225 #define CL_MEM_TYPE_SHARED_INTEL 0x4199
2228 #define CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL 0x4200
2229 #define CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL 0x4201
2230 #define CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL 0x4202
2231 #define CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL 0x4203
2234 #define CL_COMMAND_MEMFILL_INTEL 0x4204
2235 #define CL_COMMAND_MEMCPY_INTEL 0x4205
2236 #define CL_COMMAND_MIGRATEMEM_INTEL 0x4206
2237 #define CL_COMMAND_MEMADVISE_INTEL 0x4207
2243 const cl_mem_properties_intel* properties,
2252 const cl_mem_properties_intel* properties,
2261 const cl_mem_properties_intel* properties,
2280 cl_mem_info_intel param_name,
2281 size_t param_value_size,
2283 size_t* param_value_size_ret) ;
2289 const void* arg_value) ;
2296 size_t pattern_size,
2298 cl_uint num_events_in_wait_list,
2307 const void* src_ptr,
2309 cl_uint num_events_in_wait_list,
2318 cl_mem_advice_intel advice,
2319 cl_uint num_events_in_wait_list,
2323 #ifndef CL_NO_PROTOTYPES
2328 const cl_mem_properties_intel* properties,
2337 const cl_mem_properties_intel* properties,
2346 const cl_mem_properties_intel* properties,
2365 cl_mem_info_intel param_name,
2366 size_t param_value_size,
2368 size_t* param_value_size_ret) ;
2374 const void* arg_value) ;
2380 const void* pattern,
2381 size_t pattern_size,
2383 cl_uint num_events_in_wait_list,
2392 const void* src_ptr,
2394 cl_uint num_events_in_wait_list,
2403 cl_mem_advice_intel advice,
2404 cl_uint num_events_in_wait_list,
2410 #if defined(CL_VERSION_1_2)
2414 clEnqueueMigrateMemINTEL_fn)(
2418 cl_mem_migration_flags
flags,
2419 cl_uint num_events_in_wait_list,
2423 #ifndef CL_NO_PROTOTYPES
2426 clEnqueueMigrateMemINTEL(
2430 cl_mem_migration_flags flags,
2431 cl_uint num_events_in_wait_list,
2447 cl_uint num_events_in_wait_list,
2451 #ifndef CL_NO_PROTOTYPES
2459 cl_uint num_events_in_wait_list,
2468 #define cl_intel_mem_alloc_buffer_location 1
2469 #define CL_INTEL_MEM_ALLOC_BUFFER_LOCATION_EXTENSION_NAME \
2470 "cl_intel_mem_alloc_buffer_location"
2473 #define CL_MEM_ALLOC_BUFFER_LOCATION_INTEL 0x419E
2482 #define cl_intel_create_buffer_with_properties 1
2487 const cl_mem_properties_intel* properties,
2496 const cl_mem_properties_intel* properties,
2500 cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
2506 #define CL_MEM_CHANNEL_INTEL 0x4213
2512 #define cl_intel_mem_force_host_memory 1
2515 #define CL_MEM_FORCE_HOST_MEMORY_INTEL (1 << 20)
2520 #define cl_intel_command_queue_families 1
2524 #define CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL 64
2534 #define CL_DEVICE_QUEUE_FAMILY_PROPERTIES_INTEL 0x418B
2537 #define CL_QUEUE_FAMILY_INTEL 0x418C
2538 #define CL_QUEUE_INDEX_INTEL 0x418D
2541 #define CL_QUEUE_DEFAULT_CAPABILITIES_INTEL 0
2542 #define CL_QUEUE_CAPABILITY_CREATE_SINGLE_QUEUE_EVENTS_INTEL (1 << 0)
2543 #define CL_QUEUE_CAPABILITY_CREATE_CROSS_QUEUE_EVENTS_INTEL (1 << 1)
2544 #define CL_QUEUE_CAPABILITY_SINGLE_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 2)
2545 #define CL_QUEUE_CAPABILITY_CROSS_QUEUE_EVENT_WAIT_LIST_INTEL (1 << 3)
2546 #define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_INTEL (1 << 8)
2547 #define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_RECT_INTEL (1 << 9)
2548 #define CL_QUEUE_CAPABILITY_MAP_BUFFER_INTEL (1 << 10)
2549 #define CL_QUEUE_CAPABILITY_FILL_BUFFER_INTEL (1 << 11)
2550 #define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_INTEL (1 << 12)
2551 #define CL_QUEUE_CAPABILITY_MAP_IMAGE_INTEL (1 << 13)
2552 #define CL_QUEUE_CAPABILITY_FILL_IMAGE_INTEL (1 << 14)
2553 #define CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_IMAGE_INTEL (1 << 15)
2554 #define CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_BUFFER_INTEL (1 << 16)
2555 #define CL_QUEUE_CAPABILITY_MARKER_INTEL (1 << 24)
2556 #define CL_QUEUE_CAPABILITY_BARRIER_INTEL (1 << 25)
2557 #define CL_QUEUE_CAPABILITY_KERNEL_INTEL (1 << 26)
2563 #define cl_intel_queue_no_sync_operations 1
2566 #define CL_QUEUE_NO_SYNC_OPERATIONS_INTEL (1 << 29)
2571 #define cl_intel_sharing_format_query 1
2577 #ifdef CL_VERSION_3_0
2579 #define cl_ext_image_requirements_info 1
2581 typedef cl_uint cl_image_requirements_info_ext;
2583 #define CL_IMAGE_REQUIREMENTS_ROW_PITCH_ALIGNMENT_EXT 0x1290
2584 #define CL_IMAGE_REQUIREMENTS_BASE_ADDRESS_ALIGNMENT_EXT 0x1292
2585 #define CL_IMAGE_REQUIREMENTS_SIZE_EXT 0x12B2
2586 #define CL_IMAGE_REQUIREMENTS_MAX_WIDTH_EXT 0x12B3
2587 #define CL_IMAGE_REQUIREMENTS_MAX_HEIGHT_EXT 0x12B4
2588 #define CL_IMAGE_REQUIREMENTS_MAX_DEPTH_EXT 0x12B5
2589 #define CL_IMAGE_REQUIREMENTS_MAX_ARRAY_SIZE_EXT 0x12B6
2592 clGetImageRequirementsInfoEXT(
2594 const cl_mem_properties* properties,
2597 const cl_image_desc* image_desc,
2598 cl_image_requirements_info_ext param_name,
2599 size_t param_value_size,
2604 clGetImageRequirementsInfoEXT_fn)(
2606 const cl_mem_properties* properties,
2609 const cl_image_desc* image_desc,
2610 cl_image_requirements_info_ext param_name,
2611 size_t param_value_size,
2613 size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_3_0;
2621 #ifdef CL_VERSION_3_0
2623 #define cl_ext_image_from_buffer 1
2625 #define CL_IMAGE_REQUIREMENTS_SLICE_PITCH_ALIGNMENT_EXT 0x1291
GLsizei GLenum GLsizei GLsizei GLuint memory
cl_int(CL_API_CALL * clReleaseCommandBufferKHR_fn)(cl_command_buffer_khr command_buffer)
struct _cl_device_id * cl_device_id
cl_int(CL_API_CALL * clEnqueueWaitSemaphoresKHR_fn)(cl_command_queue command_queue, cl_uint num_sema_objects, const cl_semaphore_khr *sema_objects, const cl_semaphore_payload_khr *sema_payload_list, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
struct _cl_mutable_base_config_khr cl_mutable_base_config_khr
cl_int(CL_API_CALL * clGetKernelSuggestedLocalWorkSizeKHR_fn)(cl_command_queue command_queue, cl_kernel kernel, cl_uint work_dim, const size_t *global_work_offset, const size_t *global_work_size, size_t *suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0
cl_int(CL_API_CALL * clCommandCopyImageToBufferKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_image, cl_mem dst_buffer, const size_t *src_origin, const size_t *region, size_t dst_offset, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_int(CL_API_CALL * clMemFreeINTEL_fn)(cl_context context, void *ptr)
cl_int(CL_API_CALL * clCommandCopyBufferToImageKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_buffer, cl_mem dst_image, size_t src_offset, const size_t *dst_origin, const size_t *region, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_int(CL_API_CALL * clEnqueueReleaseExternalMemObjectsKHR_fn)(cl_command_queue command_queue, cl_uint num_mem_objects, const cl_mem *mem_objects, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_3_0
cl_uint cl_image_pitch_info_qcom
cl_int(CL_API_CALL * clTerminateContextKHR_fn)(cl_context context) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clEnqueueMemsetINTEL(cl_command_queue command_queue, void *dst_ptr, cl_int value, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
cl_uint cl_kernel_sub_group_info
CL_API_ENTRY cl_int CL_API_CALL clEnqueueReleaseExternalMemObjectsKHR(cl_command_queue command_queue, cl_uint num_mem_objects, const cl_mem *mem_objects, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_3_0
struct _cl_context * cl_context
cl_properties cl_semaphore_properties_khr
cl_command_buffer_khr(CL_API_CALL * clCreateCommandBufferKHR_fn)(cl_uint num_queues, const cl_command_queue *queues, const cl_command_buffer_properties_khr *properties, cl_int *errcode_ret)
cl_uint cl_queue_throttle_khr
CL_API_ENTRY cl_int CL_API_CALL clCommandCopyBufferRectKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_buffer, cl_mem dst_buffer, const size_t *src_origin, const size_t *dst_origin, const size_t *region, size_t src_row_pitch, size_t src_slice_pitch, size_t dst_row_pitch, size_t dst_slice_pitch, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_uint cl_diagnostics_verbose_level
CL_API_ENTRY cl_int CL_API_CALL clEnqueueSVMMemFillARM(cl_command_queue command_queue, void *svm_ptr, const void *pattern, size_t pattern_size, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clRetainDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1
struct _cl_mutable_dispatch_config_khr cl_mutable_dispatch_config_khr
struct _cl_mutable_dispatch_exec_info_khr cl_mutable_dispatch_exec_info_khr
cl_uint cl_accelerator_info_intel
cl_ulong cl_device_partition_property_ext
cl_accelerator_intel(CL_API_CALL * clCreateAcceleratorINTEL_fn)(cl_context context, cl_accelerator_type_intel accelerator_type, size_t descriptor_size, const void *descriptor, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clEnqueueAcquireGrallocObjectsIMG(cl_command_queue command_queue, cl_uint num_objects, const cl_mem *mem_objects, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
cl_int(CL_API_CALL * clCreateSubDevicesEXT_fn)(cl_device_id in_device, const cl_device_partition_property_ext *properties, cl_uint num_entries, cl_device_id *out_devices, cl_uint *num_devices) CL_API_SUFFIX__VERSION_1_1
cl_int(CL_API_CALL * clCommandFillImageKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem image, const void *fill_color, const size_t *origin, const size_t *region, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_uint cl_mutable_command_info_khr
cl_bitfield cl_device_svm_capabilities_arm
CL_API_ENTRY cl_int CL_API_CALL clRetainCommandBufferKHR(cl_command_buffer_khr command_buffer)
cl_uint cl_command_buffer_info_khr
cl_int(CL_API_CALL * clGetCommandBufferInfoKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_buffer_info_khr param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
CL_API_ENTRY cl_int CL_API_CALL clGetMutableCommandInfoKHR(cl_mutable_command_khr command, cl_mutable_command_info_khr param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
CL_API_ENTRY cl_semaphore_khr CL_API_CALL clCreateSemaphoreWithPropertiesKHR(cl_context context, const cl_semaphore_properties_khr *sema_props, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
const cl_mutable_dispatch_arg_khr * arg_list
CL_API_ENTRY cl_int CL_API_CALL clEnqueueCommandBufferKHR(cl_uint num_queues, cl_command_queue *queues, cl_command_buffer_khr command_buffer, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
CL_API_ENTRY cl_int CL_API_CALL clSetKernelArgSVMPointerARM(cl_kernel kernel, cl_uint arg_index, const void *arg_value) CL_API_SUFFIX__VERSION_1_2
cl_int(CL_API_CALL * clEnqueueSignalSemaphoresKHR_fn)(cl_command_queue command_queue, cl_uint num_sema_objects, const cl_semaphore_khr *sema_objects, const cl_semaphore_payload_khr *sema_payload_list, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clGetKernelSubGroupInfoKHR(cl_kernel in_kernel, cl_device_id in_device, cl_kernel_sub_group_info param_name, size_t input_value_size, const void *input_value, size_t param_value_size, void *param_value, size_t *param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED
cl_int(CL_API_CALL * clRetainAcceleratorINTEL_fn)(cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2
const size_t * global_work_size
GLsizei const GLfloat * value
cl_program(CL_API_CALL * clCreateProgramWithILKHR_fn)(cl_context context, const void *il, size_t length, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_mem CL_API_CALL clCreateBufferWithPropertiesINTEL(cl_context context, const cl_mem_properties_intel *properties, cl_mem_flags flags, size_t size, void *host_ptr, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_0
cl_int(CL_API_CALL * clGetSemaphoreInfoKHR_fn)(cl_semaphore_khr sema_object, cl_semaphore_info_khr param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clEnqueueReleaseGrallocObjectsIMG(cl_command_queue command_queue, cl_uint num_objects, const cl_mem *mem_objects, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
cl_uint num_mutable_dispatch
cl_int(CL_API_CALL * clEnqueueAcquireExternalMemObjectsKHR_fn)(cl_command_queue command_queue, cl_uint num_mem_objects, const cl_mem *mem_objects, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_3_0
CL_API_ENTRY cl_int CL_API_CALL clRetainAcceleratorINTEL(cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2
cl_command_queue_capabilities_intel capabilities
cl_uint cl_mem_info_intel
cl_properties cl_mem_properties_intel
cl_int(CL_API_CALL * clCommandBarrierWithWaitListKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
CL_API_ENTRY void CL_API_CALL clLogMessagesToStderrAPPLE(const char *errstr, const void *private_info, size_t cb, void *user_data) CL_API_SUFFIX__VERSION_1_0
GLuint GLsizei GLsizei * length
CL_API_ENTRY cl_accelerator_intel CL_API_CALL clCreateAcceleratorINTEL(cl_context context, cl_accelerator_type_intel accelerator_type, size_t descriptor_size, const void *descriptor, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
struct _cl_device_pci_bus_info_khr cl_device_pci_bus_info_khr
CL_API_ENTRY void *CL_API_CALL clDeviceMemAllocINTEL(cl_context context, cl_device_id device, const cl_mem_properties_intel *properties, size_t size, cl_uint alignment, cl_int *errcode_ret)
CL_API_ENTRY cl_int CL_API_CALL clCommandCopyImageKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_image, cl_mem dst_image, const size_t *src_origin, const size_t *dst_origin, const size_t *region, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_int(CL_API_CALL * clGetKernelSubGroupInfoKHR_fn)(cl_kernel in_kernel, cl_device_id in_device, cl_kernel_sub_group_info param_name, size_t input_value_size, const void *input_value, size_t param_value_size, void *param_value, size_t *param_value_size_ret) CL_API_SUFFIX__VERSION_2_0_DEPRECATED
cl_int(CL_API_CALL * clEnqueueMemsetINTEL_fn)(cl_command_queue command_queue, void *dst_ptr, cl_int value, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
GLenum GLenum GLsizei void * image
CL_API_ENTRY cl_command_queue CL_API_CALL clCreateCommandQueueWithPropertiesKHR(cl_context context, cl_device_id device, const cl_queue_properties_khr *properties, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clEnqueueMemFillINTEL(cl_command_queue command_queue, void *dst_ptr, const void *pattern, size_t pattern_size, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
cl_uint host_cache_policy
CL_API_ENTRY cl_int CL_API_CALL clEnqueueSVMMapARM(cl_command_queue command_queue, cl_bool blocking_map, cl_map_flags flags, void *svm_ptr, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
struct _cl_semaphore_khr * cl_semaphore_khr
CL_API_ENTRY cl_int CL_API_CALL clReleaseDeviceEXT(cl_device_id device) CL_API_SUFFIX__VERSION_1_1
CL_API_ENTRY cl_int CL_API_CALL clEnqueueSVMFreeARM(cl_command_queue command_queue, cl_uint num_svm_pointers, void *svm_pointers[], void(CL_CALLBACK *pfn_free_func)(cl_command_queue queue, cl_uintnum_svm_pointers, void *svm_pointers[], void *user_data), void *user_data, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
cl_uint cl_semaphore_info_khr
cl_int(CL_API_CALL * clIcdGetPlatformIDsKHR_fn)(cl_uint num_entries, cl_platform_id *platforms, cl_uint *num_platforms)
CL_API_ENTRY cl_int CL_API_CALL clCreateSubDevicesEXT(cl_device_id in_device, const cl_device_partition_property_ext *properties, cl_uint num_entries, cl_device_id *out_devices, cl_uint *num_devices) CL_API_SUFFIX__VERSION_1_1
struct _cl_mem_ext_host_ptr cl_mem_ext_host_ptr
const size_t * local_work_size
cl_int(CL_API_CALL * clGetAcceleratorInfoINTEL_fn)(cl_accelerator_intel accelerator, cl_accelerator_info_intel param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret) CL_API_SUFFIX__VERSION_1_2
cl_bitfield cl_mem_alloc_flags_img
cl_int(CL_API_CALL * clMemBlockingFreeINTEL_fn)(cl_context context, void *ptr)
CL_API_ENTRY void *CL_API_CALL clSVMAllocARM(cl_context context, cl_svm_mem_flags_arm flags, size_t size, cl_uint alignment) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clEnqueueMemcpyINTEL(cl_command_queue command_queue, cl_bool blocking, void *dst_ptr, const void *src_ptr, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
cl_int(CL_API_CALL * clCommandNDRangeKernelKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, const cl_ndrange_kernel_command_properties_khr *properties, cl_kernel kernel, cl_uint work_dim, const size_t *global_work_offset, const size_t *global_work_size, const size_t *local_work_size, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
struct _cl_platform_id * cl_platform_id
cl_bitfield cl_mutable_dispatch_fields_khr
cl_bool accumulating_saturating_unsigned_accelerated
CL_API_ENTRY cl_int CL_API_CALL clReleaseAcceleratorINTEL(cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2
cl_uint cl_command_termination_reason_arm
struct _cl_device_integer_dot_product_acceleration_properties_khr cl_device_integer_dot_product_acceleration_properties_khr
cl_uint cl_external_memory_handle_type_khr
cl_int(CL_API_CALL * clEnqueueMemcpyINTEL_fn)(cl_command_queue command_queue, cl_bool blocking, void *dst_ptr, const void *src_ptr, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
#define CL_NAME_VERSION_MAX_NAME_SIZE_KHR
cl_int(CL_API_CALL * clCommandCopyBufferRectKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_buffer, cl_mem dst_buffer, const size_t *src_origin, const size_t *dst_origin, const size_t *region, size_t src_row_pitch, size_t src_slice_pitch, size_t dst_row_pitch, size_t dst_slice_pitch, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
CL_API_ENTRY cl_program CL_API_CALL clCreateProgramWithILKHR(cl_context context, const void *il, size_t length, cl_int *errcode_ret)
cl_bitfield cl_device_controlled_termination_capabilities_arm
cl_bitfield cl_mem_migration_flags_ext
cl_int(CL_API_CALL * clCommandCopyImageKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_image, cl_mem dst_image, const size_t *src_origin, const size_t *dst_origin, const size_t *region, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_uint cl_command_buffer_structure_type_khr
cl_bitfield cl_svm_mem_flags_arm
cl_mutable_command_khr command
cl_int(CL_API_CALL * clGetSemaphoreHandleForTypeKHR_fn)(cl_semaphore_khr sema_object, cl_device_id device, cl_external_semaphore_handle_type_khr handle_type, size_t handle_size, void *handle_ptr, size_t *handle_size_ret) CL_API_SUFFIX__VERSION_1_2
cl_bitfield cl_device_integer_dot_product_capabilities_khr
cl_bool mixed_signedness_accelerated
cl_command_buffer_structure_type_khr type
CL_API_ENTRY cl_int CL_API_CALL clGetDeviceImageInfoQCOM(cl_device_id device, size_t image_width, size_t image_height, const cl_image_format *image_format, cl_image_pitch_info_qcom param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
CL_API_ENTRY cl_int CL_API_CALL clTerminateContextKHR(cl_context context) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clGetSemaphoreHandleForTypeKHR(cl_semaphore_khr sema_object, cl_device_id device, cl_external_semaphore_handle_type_khr handle_type, size_t handle_size, void *handle_ptr, size_t *handle_size_ret) CL_API_SUFFIX__VERSION_1_2
cl_uint cl_unified_shared_memory_type_intel
cl_bool accumulating_saturating_mixed_signedness_accelerated
const cl_mutable_dispatch_arg_khr * arg_svm_list
struct _cl_name_version_khr cl_name_version_khr
cl_bitfield cl_device_unified_shared_memory_capabilities_intel
CL_API_ENTRY cl_int CL_API_CALL clSetKernelExecInfoARM(cl_kernel kernel, cl_kernel_exec_info_arm param_name, size_t param_value_size, const void *param_value) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clEnqueueGenerateMipmapIMG(cl_command_queue command_queue, cl_mem src_image, cl_mem dst_image, cl_mipmap_filter_mode_img mipmap_filter_mode, const size_t *array_region, const size_t *mip_region, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
cl_bitfield cl_mem_alloc_flags_intel
cl_int(CL_API_CALL * clEnqueueCommandBufferKHR_fn)(cl_uint num_queues, cl_command_queue *queues, cl_command_buffer_khr command_buffer, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
cl_int(CL_API_CALL * clUpdateMutableCommandsKHR_fn)(cl_command_buffer_khr command_buffer, const cl_mutable_base_config_khr *mutable_config)
intptr_t cl_import_properties_arm
cl_int(CL_API_CALL * clRetainSemaphoreKHR_fn)(cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2
cl_bitfield cl_device_feature_capabilities_intel
struct _cl_kernel * cl_kernel
struct _cl_mutable_command_khr * cl_mutable_command_khr
cl_uint cl_mipmap_filter_mode_img
CL_API_ENTRY void *CL_API_CALL clSharedMemAllocINTEL(cl_context context, cl_device_id device, const cl_mem_properties_intel *properties, size_t size, cl_uint alignment, cl_int *errcode_ret)
cl_uint cl_semaphore_type_khr
struct _cl_accelerator_intel * cl_accelerator_intel
cl_properties cl_command_buffer_properties_khr
cl_bitfield cl_command_queue_properties
CL_API_ENTRY cl_int CL_API_CALL clEnqueueMemAdviseINTEL(cl_command_queue command_queue, const void *ptr, size_t size, cl_mem_advice_intel advice, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
CL_API_ENTRY cl_int CL_API_CALL clReleaseCommandBufferKHR(cl_command_buffer_khr command_buffer)
cl_uint cl_mem_advice_intel
*get result *(waiting if necessary)*A common idiom is to fire a bunch of sub tasks at the queue
CL_API_ENTRY cl_int CL_API_CALL clIcdGetPlatformIDsKHR(cl_uint num_entries, cl_platform_id *platforms, cl_uint *num_platforms)
CL_API_ENTRY cl_int CL_API_CALL clCommandCopyBufferKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_buffer, cl_mem dst_buffer, size_t src_offset, size_t dst_offset, size_t size, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_bool accumulating_saturating_signed_accelerated
cl_int(CL_API_CALL * clReleaseDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1
struct _cl_command_buffer_khr * cl_command_buffer_khr
CL_API_ENTRY cl_int CL_API_CALL clEnqueueSVMUnmapARM(cl_command_queue command_queue, void *svm_ptr, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
cl_int(CL_API_CALL * clSetKernelArgMemPointerINTEL_fn)(cl_kernel kernel, cl_uint arg_index, const void *arg_value)
GLuint const GLchar * name
cl_uint cl_external_semaphore_handle_type_khr
cl_bool signed_accelerated
#define CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL
CL_API_ENTRY cl_int CL_API_CALL clSetKernelArgMemPointerINTEL(cl_kernel kernel, cl_uint arg_index, const void *arg_value)
CL_API_ENTRY cl_int CL_API_CALL clGetMemAllocInfoINTEL(cl_context context, const void *ptr, cl_mem_info_intel param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
struct _cl_motion_estimation_desc_intel cl_motion_estimation_desc_intel
CL_API_ENTRY cl_int CL_API_CALL clGetAcceleratorInfoINTEL(cl_accelerator_intel accelerator, cl_accelerator_info_intel param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret) CL_API_SUFFIX__VERSION_1_2
void *(CL_API_CALL * clHostMemAllocINTEL_fn)(cl_context context, const cl_mem_properties_intel *properties, size_t size, cl_uint alignment, cl_int *errcode_ret)
cl_command_queue(CL_API_CALL * clCreateCommandQueueWithPropertiesKHR_fn)(cl_context context, cl_device_id device, const cl_queue_properties_khr *properties, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
cl_command_queue_properties properties
CL_API_ENTRY cl_int CL_API_CALL clEnqueueSVMMemcpyARM(cl_command_queue command_queue, cl_bool blocking_copy, void *dst_ptr, const void *src_ptr, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
struct _cl_mem_android_native_buffer_host_ptr cl_mem_android_native_buffer_host_ptr
cl_int(CL_API_CALL * clEnqueueMemFillINTEL_fn)(cl_command_queue command_queue, void *dst_ptr, const void *pattern, size_t pattern_size, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
const size_t * global_work_offset
CL_API_ENTRY cl_int CL_API_CALL clGetKernelSuggestedLocalWorkSizeKHR(cl_command_queue command_queue, cl_kernel kernel, cl_uint work_dim, const size_t *global_work_offset, const size_t *global_work_size, size_t *suggested_local_work_size) CL_API_SUFFIX__VERSION_3_0
cl_mem_ext_host_ptr ext_host_ptr
CL_API_ENTRY cl_int CL_API_CALL clCommandCopyImageToBufferKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_image, cl_mem dst_buffer, const size_t *src_origin, const size_t *region, size_t dst_offset, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_properties cl_queue_properties_khr
struct _cl_mutable_dispatch_arg_khr cl_mutable_dispatch_arg_khr
CL_API_ENTRY cl_int CL_API_CALL clFinalizeCommandBufferKHR(cl_command_buffer_khr command_buffer)
CL_API_ENTRY cl_int CL_API_CALL clCommandBarrierWithWaitListKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_ulong cl_semaphore_payload_khr
void *(CL_API_CALL * clDeviceMemAllocINTEL_fn)(cl_context context, cl_device_id device, const cl_mem_properties_intel *properties, size_t size, cl_uint alignment, cl_int *errcode_ret)
cl_semaphore_khr(CL_API_CALL * clCreateSemaphoreWithPropertiesKHR_fn)(cl_context context, const cl_semaphore_properties_khr *sema_props, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_2
cl_int(CL_API_CALL * clRetainDeviceEXT_fn)(cl_device_id device) CL_API_SUFFIX__VERSION_1_1
struct _cl_queue_family_properties_intel cl_queue_family_properties_intel
CL_API_ENTRY cl_int CL_API_CALL clEnqueueWaitSemaphoresKHR(cl_command_queue command_queue, cl_uint num_sema_objects, const cl_semaphore_khr *sema_objects, const cl_semaphore_payload_khr *sema_payload_list, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
struct _cl_event * cl_event
CL_API_ENTRY cl_int CL_API_CALL clGetSemaphoreInfoKHR(cl_semaphore_khr sema_object, cl_semaphore_info_khr param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret) CL_API_SUFFIX__VERSION_1_2
cl_mem(CL_API_CALL * clCreateBufferWithPropertiesINTEL_fn)(cl_context context, const cl_mem_properties_intel *properties, cl_mem_flags flags, size_t size, void *host_ptr, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_0
cl_int(CL_API_CALL * clEnqueueMigrateMemObjectEXT_fn)(cl_command_queue command_queue, cl_uint num_mem_objects, const cl_mem *mem_objects, cl_mem_migration_flags_ext flags, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
cl_uint cl_sync_point_khr
cl_bitfield cl_device_command_buffer_capabilities_khr
struct _cl_command_queue * cl_command_queue
cl_bitfield cl_command_buffer_flags_khr
cl_int(CL_API_CALL * clReleaseAcceleratorINTEL_fn)(cl_accelerator_intel accelerator) CL_API_SUFFIX__VERSION_1_2
cl_bitfield cl_command_queue_capabilities_intel
cl_uint cl_kernel_exec_info_arm
CL_API_ENTRY cl_int CL_API_CALL clEnqueueAcquireExternalMemObjectsKHR(cl_command_queue command_queue, cl_uint num_mem_objects, const cl_mem *mem_objects, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_3_0
cl_uint cl_command_buffer_state_khr
cl_uint cl_accelerator_type_intel
CL_API_ENTRY cl_int CL_API_CALL clEnqueueSignalSemaphoresKHR(cl_command_queue command_queue, cl_uint num_sema_objects, const cl_semaphore_khr *sema_objects, const cl_semaphore_payload_khr *sema_payload_list, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event) CL_API_SUFFIX__VERSION_1_2
cl_int(CL_API_CALL * clGetMutableCommandInfoKHR_fn)(cl_mutable_command_khr command, cl_mutable_command_info_khr param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
CL_API_ENTRY cl_int CL_API_CALL clMemFreeINTEL(cl_context context, void *ptr)
CL_API_ENTRY cl_int CL_API_CALL clMemBlockingFreeINTEL(cl_context context, void *ptr)
struct _cl_program * cl_program
const cl_mutable_dispatch_exec_info_khr * exec_info_list
cl_int(CL_API_CALL * clReleaseSemaphoreKHR_fn)(cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2
const cl_mutable_dispatch_config_khr * mutable_dispatch_list
CL_API_ENTRY cl_mem CL_API_CALL clImportMemoryARM(cl_context context, cl_mem_flags flags, const cl_import_properties_arm *properties, void *memory, size_t size, cl_int *errcode_ret) CL_API_SUFFIX__VERSION_1_0
CL_API_ENTRY cl_int CL_API_CALL clGetCommandBufferInfoKHR(cl_command_buffer_khr command_buffer, cl_command_buffer_info_khr param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
CL_API_ENTRY cl_int CL_API_CALL clEnqueueMigrateMemObjectEXT(cl_command_queue command_queue, cl_uint num_mem_objects, const cl_mem *mem_objects, cl_mem_migration_flags_ext flags, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
CL_API_ENTRY void CL_API_CALL clLogMessagesToStdoutAPPLE(const char *errstr, const void *private_info, size_t cb, void *user_data) CL_API_SUFFIX__VERSION_1_0
CL_API_ENTRY cl_int CL_API_CALL clCommandCopyBufferToImageKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_buffer, cl_mem dst_image, size_t src_offset, const size_t *dst_origin, const size_t *region, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_int(CL_API_CALL * clEnqueueMemAdviseINTEL_fn)(cl_command_queue command_queue, const void *ptr, size_t size, cl_mem_advice_intel advice, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event)
cl_bool unsigned_accelerated
CL_API_ENTRY cl_int CL_API_CALL clCommandNDRangeKernelKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, const cl_ndrange_kernel_command_properties_khr *properties, cl_kernel kernel, cl_uint work_dim, const size_t *global_work_offset, const size_t *global_work_size, const size_t *local_work_size, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_int(CL_API_CALL * clCommandFillBufferKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem buffer, const void *pattern, size_t pattern_size, size_t offset, size_t size, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
cl_mem_ext_host_ptr ext_host_ptr
cl_properties cl_ndrange_kernel_command_properties_khr
cl_bitfield cl_device_scheduling_controls_capabilities_arm
cl_command_buffer_structure_type_khr type
struct _cl_mem_ion_host_ptr cl_mem_ion_host_ptr
cl_int(CL_API_CALL * clGetMemAllocInfoINTEL_fn)(cl_context context, const void *ptr, cl_mem_info_intel param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
CL_API_ENTRY cl_int CL_API_CALL clReleaseSemaphoreKHR(cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clUpdateMutableCommandsKHR(cl_command_buffer_khr command_buffer, const cl_mutable_base_config_khr *mutable_config)
cl_int(CL_API_CALL * clCommandCopyBufferKHR_fn)(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem src_buffer, cl_mem dst_buffer, size_t src_offset, size_t dst_offset, size_t size, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
CL_API_ENTRY void CL_API_CALL clLogMessagesToSystemLogAPPLE(const char *errstr, const void *private_info, size_t cb, void *user_data) CL_API_SUFFIX__VERSION_1_0
void *(CL_API_CALL * clSharedMemAllocINTEL_fn)(cl_context context, cl_device_id device, const cl_mem_properties_intel *properties, size_t size, cl_uint alignment, cl_int *errcode_ret)
cl_int(CL_API_CALL * clRetainCommandBufferKHR_fn)(cl_command_buffer_khr command_buffer)
CL_API_ENTRY void *CL_API_CALL clHostMemAllocINTEL(cl_context context, const cl_mem_properties_intel *properties, size_t size, cl_uint alignment, cl_int *errcode_ret)
cl_uint cl_queue_priority_khr
CL_API_ENTRY cl_int CL_API_CALL clCommandFillImageKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem image, const void *fill_color, const size_t *origin, const size_t *region, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
CL_API_ENTRY cl_int CL_API_CALL clCommandFillBufferKHR(cl_command_buffer_khr command_buffer, cl_command_queue command_queue, cl_mem buffer, const void *pattern, size_t pattern_size, size_t offset, size_t size, cl_uint num_sync_points_in_wait_list, const cl_sync_point_khr *sync_point_wait_list, cl_sync_point_khr *sync_point, cl_mutable_command_khr *mutable_handle)
CL_API_ENTRY cl_int CL_API_CALL clSetMemObjectDestructorAPPLE(cl_mem memobj, void(*pfn_notify)(cl_mem memobj, void *user_data), void *user_data) CL_API_SUFFIX__VERSION_1_0
cl_int(CL_API_CALL * clFinalizeCommandBufferKHR_fn)(cl_command_buffer_khr command_buffer)
CL_API_ENTRY void CL_API_CALL clSVMFreeARM(cl_context context, void *svm_pointer) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_int CL_API_CALL clRetainSemaphoreKHR(cl_semaphore_khr sema_object) CL_API_SUFFIX__VERSION_1_2
CL_API_ENTRY cl_command_buffer_khr CL_API_CALL clCreateCommandBufferKHR(cl_uint num_queues, const cl_command_queue *queues, const cl_command_buffer_properties_khr *properties, cl_int *errcode_ret)